<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.5"/>
<title>v_hdmirx1: xv_hdmirx1_frl.c File Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
  $(window).load(resizeHeight);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.png"/></td>
  <td style="padding-left: 0.5em;">
   <div id="projectname">v_hdmirx1
   </div>
   <div id="projectbrief">Vitis Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.5 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Overview</span></a></li>
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="globals.html"><span>APIs</span></a></li>
      <li><a href="files.html"><span>File&#160;List</span></a></li>
    </ul>
  </div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('xv__hdmirx1__frl_8c.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#func-members">Functions</a> &#124;
<a href="#var-members">Variables</a>  </div>
  <div class="headertitle">
<div class="title">xv_hdmirx1_frl.c File Reference</div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This is the main file for Xilinx HDMI RX core for FRL. </p>
<p>Please see xv_hdmirx1_frl.h for more details of the driver.</p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who    Date     Changes
</p>
<hr/>
<p>
1.00  EB     25/06/18 Initial release.
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:a8b8df1df4274fd34afc6ad600c4d1605"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a8b8df1df4274fd34afc6ad600c4d1605">XV_HdmiRx1_FrlModeEnable</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 LtpThreshold, XV_HdmiRx1_FrlLtp DefaultLtp, u8 FfeSuppFlag)</td></tr>
<tr class="memdesc:a8b8df1df4274fd34afc6ad600c4d1605"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the FRL mode.  <a href="#a8b8df1df4274fd34afc6ad600c4d1605">More...</a><br/></td></tr>
<tr class="separator:a8b8df1df4274fd34afc6ad600c4d1605"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adaa4205184958f79b8aa3d2e39b97661"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#adaa4205184958f79b8aa3d2e39b97661">XV_HdmiRx1_ExecFrlState</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:adaa4205184958f79b8aa3d2e39b97661"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function executes the different of states of FRL.  <a href="#adaa4205184958f79b8aa3d2e39b97661">More...</a><br/></td></tr>
<tr class="separator:adaa4205184958f79b8aa3d2e39b97661"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af9ac94749a5d49d68879dda13618a3fd"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#af9ac94749a5d49d68879dda13618a3fd">XV_HdmiRx1_GetPatternsMatchStatus</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:af9ac94749a5d49d68879dda13618a3fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the status of the patterns matched lanes.  <a href="#af9ac94749a5d49d68879dda13618a3fd">More...</a><br/></td></tr>
<tr class="separator:af9ac94749a5d49d68879dda13618a3fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adebf854f66fb92c37366faab549dd4a8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#adebf854f66fb92c37366faab549dd4a8">XV_HdmiRx1_PhyResetPoll</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:adebf854f66fb92c37366faab549dd4a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function polls the pattern matching status and decide if the Phy needs to be reset or not.  <a href="#adebf854f66fb92c37366faab549dd4a8">More...</a><br/></td></tr>
<tr class="separator:adebf854f66fb92c37366faab549dd4a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adf3222be232d5b0eaabeb5fbba4258fa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#adf3222be232d5b0eaabeb5fbba4258fa">XV_HdmiRx1_SetFrlLtpDetection</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Lane, XV_HdmiRx1_FrlLtpType Ltp)</td></tr>
<tr class="memdesc:adf3222be232d5b0eaabeb5fbba4258fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the link training pattern to be detected for the selected lane.  <a href="#adf3222be232d5b0eaabeb5fbba4258fa">More...</a><br/></td></tr>
<tr class="separator:adf3222be232d5b0eaabeb5fbba4258fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6010db11abd7d7a7b935d20b693c5b7a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a6010db11abd7d7a7b935d20b693c5b7a">XV_HdmiRx1_GetFrlLtpDetection</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Lane)</td></tr>
<tr class="memdesc:a6010db11abd7d7a7b935d20b693c5b7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the link training pattern to be detected for the selected lane.  <a href="#a6010db11abd7d7a7b935d20b693c5b7a">More...</a><br/></td></tr>
<tr class="separator:a6010db11abd7d7a7b935d20b693c5b7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afd29a2caefd6060c3546e3debe17f03b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#afd29a2caefd6060c3546e3debe17f03b">XV_HdmiRx1_GetFrlTotalPixRatio</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:afd29a2caefd6060c3546e3debe17f03b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides FRL Ratio (Total Pixel)  <a href="#afd29a2caefd6060c3546e3debe17f03b">More...</a><br/></td></tr>
<tr class="separator:afd29a2caefd6060c3546e3debe17f03b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abcaa2a7e3e0a31a5d19b99179e70c636"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#abcaa2a7e3e0a31a5d19b99179e70c636">XV_HdmiRx1_GetFrlActivePixRatio</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:abcaa2a7e3e0a31a5d19b99179e70c636"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides FRL Ratio (Active Pixel)  <a href="#abcaa2a7e3e0a31a5d19b99179e70c636">More...</a><br/></td></tr>
<tr class="separator:abcaa2a7e3e0a31a5d19b99179e70c636"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0544f5226d2072e3a594677139f54d70"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a0544f5226d2072e3a594677139f54d70">XV_HdmiRx1_ResetFrlLtpDetection</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a0544f5226d2072e3a594677139f54d70"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reset the link training pattern for the specified lane.  <a href="#a0544f5226d2072e3a594677139f54d70">More...</a><br/></td></tr>
<tr class="separator:a0544f5226d2072e3a594677139f54d70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae387ae2d8723aa7ae9367694b70ac03f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#ae387ae2d8723aa7ae9367694b70ac03f">XV_HdmiRx1_FrlLtpDetectionEnable</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ae387ae2d8723aa7ae9367694b70ac03f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the LTP detection module.  <a href="#ae387ae2d8723aa7ae9367694b70ac03f">More...</a><br/></td></tr>
<tr class="separator:ae387ae2d8723aa7ae9367694b70ac03f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a82e80b12dafcd1984f11cbddbbd68551"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a82e80b12dafcd1984f11cbddbbd68551">XV_HdmiRx1_FrlLtpDetectionDisable</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a82e80b12dafcd1984f11cbddbbd68551"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the LTP detection module.  <a href="#a82e80b12dafcd1984f11cbddbbd68551">More...</a><br/></td></tr>
<tr class="separator:a82e80b12dafcd1984f11cbddbbd68551"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a095b12f733544b877279ea062c592a7d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a095b12f733544b877279ea062c592a7d">XV_HdmiRx1_SetFrlLtpThreshold</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Threshold)</td></tr>
<tr class="memdesc:a095b12f733544b877279ea062c592a7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the number of times the full link training patterns need to be matched before it is considered as a lock.  <a href="#a095b12f733544b877279ea062c592a7d">More...</a><br/></td></tr>
<tr class="separator:a095b12f733544b877279ea062c592a7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad8f801766bca274f8235adde45ddc085"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#ad8f801766bca274f8235adde45ddc085">XV_HdmiRx1_ConfigFrlLtpDetection</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ad8f801766bca274f8235adde45ddc085"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function configures the link training pattern to be detected.  <a href="#ad8f801766bca274f8235adde45ddc085">More...</a><br/></td></tr>
<tr class="separator:ad8f801766bca274f8235adde45ddc085"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a580b1f726297a49e552e2e90aa7a80f4"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a580b1f726297a49e552e2e90aa7a80f4">XV_HdmiRx1_RetrieveFrlRateLanes</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a580b1f726297a49e552e2e90aa7a80f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function updates the software's FRL Rate and FRL Lanes by reading and decoding the information from the RX core.  <a href="#a580b1f726297a49e552e2e90aa7a80f4">More...</a><br/></td></tr>
<tr class="separator:a580b1f726297a49e552e2e90aa7a80f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a07be19e39e2a3e90ea9ac937f6adfc58"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a07be19e39e2a3e90ea9ac937f6adfc58">XV_HdmiRx1_FrlLinkRetrain</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 LtpThreshold, XV_HdmiRx1_FrlLtp DefaultLtp)</td></tr>
<tr class="memdesc:a07be19e39e2a3e90ea9ac937f6adfc58"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initiates FRL rate dropping procedure.  <a href="#a07be19e39e2a3e90ea9ac937f6adfc58">More...</a><br/></td></tr>
<tr class="separator:a07be19e39e2a3e90ea9ac937f6adfc58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38c0efa82d512c42b07775e36f919bb2"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a38c0efa82d512c42b07775e36f919bb2">XV_HdmiRx1_FrlDdcReadField</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, XV_HdmiRx1_FrlScdcFieldType Field)</td></tr>
<tr class="memdesc:a38c0efa82d512c42b07775e36f919bb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads the specified FRL SCDC Field.  <a href="#a38c0efa82d512c42b07775e36f919bb2">More...</a><br/></td></tr>
<tr class="separator:a38c0efa82d512c42b07775e36f919bb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab17e4f96ebbe6785b411233165de859a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#ab17e4f96ebbe6785b411233165de859a">XV_HdmiRx1_FrlDdcWriteField</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, XV_HdmiRx1_FrlScdcFieldType Field, u8 Value)</td></tr>
<tr class="memdesc:ab17e4f96ebbe6785b411233165de859a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes the specified FRL SCDC Field.  <a href="#ab17e4f96ebbe6785b411233165de859a">More...</a><br/></td></tr>
<tr class="separator:ab17e4f96ebbe6785b411233165de859a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4806363b327ac1b624d0b470ab46c142"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a4806363b327ac1b624d0b470ab46c142">XV_HdmiRx1_SetFrlRateWrEvent_En</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a4806363b327ac1b624d0b470ab46c142"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the FRL rate write enable Event.  <a href="#a4806363b327ac1b624d0b470ab46c142">More...</a><br/></td></tr>
<tr class="separator:a4806363b327ac1b624d0b470ab46c142"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a04b941fdfc281d7d81665d47ac32f1d2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a04b941fdfc281d7d81665d47ac32f1d2">XV_HdmiRx1_FrlReset</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:a04b941fdfc281d7d81665d47ac32f1d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets the FRL peripheral.  <a href="#a04b941fdfc281d7d81665d47ac32f1d2">More...</a><br/></td></tr>
<tr class="separator:a04b941fdfc281d7d81665d47ac32f1d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa8fec3226e7abab9b6a14251bd8705ba"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#aa8fec3226e7abab9b6a14251bd8705ba">XV_HdmiRx1_SetFrl10MicroSecondsTimer</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:aa8fec3226e7abab9b6a14251bd8705ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the timer of RX Core's FRL peripheral for 10 Microseconds.  <a href="#aa8fec3226e7abab9b6a14251bd8705ba">More...</a><br/></td></tr>
<tr class="separator:aa8fec3226e7abab9b6a14251bd8705ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:a0c3427cfd06bf7a21f361cf05a3bfd91"><td class="memItemLeft" align="right" valign="top">const u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a0c3427cfd06bf7a21f361cf05a3bfd91">FrlTimeoutLts3</a> [4]</td></tr>
<tr class="memdesc:a0c3427cfd06bf7a21f361cf05a3bfd91"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains the timeout period of LTS3 for different FFE Levels in Milliseconds.  <a href="#a0c3427cfd06bf7a21f361cf05a3bfd91">More...</a><br/></td></tr>
<tr class="separator:a0c3427cfd06bf7a21f361cf05a3bfd91"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a190e62ae29dcf06fde37b0d023b934df"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="struct_x_v___hdmi_rx1___frl_scdc_field.html">XV_HdmiRx1_FrlScdcField</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1__frl_8c.html#a190e62ae29dcf06fde37b0d023b934df">FrlScdcField</a> [XV_HDMIRX1_SCDCFIELD_SIZE]</td></tr>
<tr class="memdesc:a190e62ae29dcf06fde37b0d023b934df"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains the attributes for SCDC fields Each entry consists of: 1) Register Offset 2) Bits Mask 3) Bits Shift.  <a href="#a190e62ae29dcf06fde37b0d023b934df">More...</a><br/></td></tr>
<tr class="separator:a190e62ae29dcf06fde37b0d023b934df"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Function Documentation</h2>
<a class="anchor" id="ad8f801766bca274f8235adde45ddc085"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int XV_HdmiRx1_ConfigFrlLtpDetection </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function configures the link training pattern to be detected. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Status<ul>
<li>XST_FAILURE<ul>
<li>Source has not cleared FLT_update so sink should not update FLT_req and FLT_update as to ensure proper data handshake</li>
<li>XST_SUCCESS</li>
<li>Source has cleared FLT_update and sink has updated LTP_req and set FLT_update to 1</li>
<li>XST_NO_DATA</li>
<li>Source has cleared FLT_update but no update from sink is required</li>
</ul>
</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#af43d413c9a668400e3c0b8fbac302e19">XV_HdmiRx1_Frl::CurFrlRate</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0f554039b7fe90c629cb245a727540b7">XV_HdmiRx1_Frl::DefaultLtp</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a21a4013614c2eae5fd14968ad790c669">XV_HdmiRx1_Frl::Ltp</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0eb1fb5490f5c6416d49455599444083">XV_HdmiRx1_Frl::TrainingState</a>, <a class="el" href="xv__hdmirx1_8h.html#a6010db11abd7d7a7b935d20b693c5b7a">XV_HdmiRx1_GetFrlLtpDetection()</a>, <a class="el" href="xv__hdmirx1_8h.html#a7de25fdf8166abb9ae7a4f9a3d7b5555">XV_HdmiRx1_GetTmr1Value</a>, <a class="el" href="xv__hdmirx1_8h.html#a0544f5226d2072e3a594677139f54d70">XV_HdmiRx1_ResetFrlLtpDetection()</a>, and <a class="el" href="xv__hdmirx1_8h.html#adf3222be232d5b0eaabeb5fbba4258fa">XV_HdmiRx1_SetFrlLtpDetection()</a>.</p>

</div>
</div>
<a class="anchor" id="adaa4205184958f79b8aa3d2e39b97661"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int XV_HdmiRx1_ExecFrlState </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function executes the different of states of FRL. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, and <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0eb1fb5490f5c6416d49455599444083">XV_HdmiRx1_Frl::TrainingState</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#a07be19e39e2a3e90ea9ac937f6adfc58">XV_HdmiRx1_FrlLinkRetrain()</a>, and <a class="el" href="xv__hdmirx1__frl_8c.html#a8b8df1df4274fd34afc6ad600c4d1605">XV_HdmiRx1_FrlModeEnable()</a>.</p>

</div>
</div>
<a class="anchor" id="a38c0efa82d512c42b07775e36f919bb2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XV_HdmiRx1_FrlDdcReadField </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiRx1_FrlScdcFieldType&#160;</td>
          <td class="paramname"><em>Field</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function reads the specified FRL SCDC Field. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">Field</td><td>specifies the fields from SCDC channels to be written</td></tr>
    <tr><td class="paramname">Value</td><td>specifies the values to be written</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS</li>
<li>XST_FAILURE</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl_scdc_field.html#a7ca76af091ecb7c7a9e46cf8c292ed94">XV_HdmiRx1_FrlScdcField::Offset</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac5b57521457e46c5e347db1bd1d8ac28">XV_HDMIRX1_FRL_SCDC_ADDR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a070a1c8c80d4f949700398f70e4c1184">XV_HDMIRX1_FRL_SCDC_DAT_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa5500d41f17295752a46f34a3f6ca2f3">XV_HDMIRX1_FRL_SCDC_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a96095a3a06333a80279343e58bd9a512">XV_HDMIRX1_FRL_SCDC_RD_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa89cb22259109c7e37ef35afa705782a">XV_HDMIRX1_FRL_SCDC_RDY_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#ab17e4f96ebbe6785b411233165de859a">XV_HdmiRx1_FrlDdcWriteField()</a>, <a class="el" href="xv__hdmirx1__frl_8c.html#a6010db11abd7d7a7b935d20b693c5b7a">XV_HdmiRx1_GetFrlLtpDetection()</a>, <a class="el" href="xv__hdmirx1__frl_8c.html#a580b1f726297a49e552e2e90aa7a80f4">XV_HdmiRx1_RetrieveFrlRateLanes()</a>, and <a class="el" href="xv__hdmirx1_8h.html#a8fde9d6293c66dde0cb3d18dfbf2375a">XV_HdmiRx1_UpdateEdFlags()</a>.</p>

</div>
</div>
<a class="anchor" id="ab17e4f96ebbe6785b411233165de859a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int XV_HdmiRx1_FrlDdcWriteField </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiRx1_FrlScdcFieldType&#160;</td>
          <td class="paramname"><em>Field</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Value</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function writes the specified FRL SCDC Field. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">Field</td><td>specifies the fields from SCDC channels to be written</td></tr>
    <tr><td class="paramname">Value</td><td>specifies the values to be written</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS</li>
<li>XST_FAILURE</li>
<li>XST_DEVICE_BUSY</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl_scdc_field.html#aecbfb387e752c5723ec6ac15d73dd268">XV_HdmiRx1_FrlScdcField::Mask</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl_scdc_field.html#acb6b6b9a6a07477a53365e9f879ac168">XV_HdmiRx1_FrlScdcField::Shift</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac5b57521457e46c5e347db1bd1d8ac28">XV_HDMIRX1_FRL_SCDC_ADDR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#afc293c2e58cd8a42b857d83e4cb388b5">XV_HDMIRX1_FRL_SCDC_DAT_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a070a1c8c80d4f949700398f70e4c1184">XV_HDMIRX1_FRL_SCDC_DAT_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa5500d41f17295752a46f34a3f6ca2f3">XV_HDMIRX1_FRL_SCDC_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa89cb22259109c7e37ef35afa705782a">XV_HDMIRX1_FRL_SCDC_RDY_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#affb659995dc3b980da1ecf2bea25f794">XV_HDMIRX1_FRL_SCDC_WR_MASK</a>, <a class="el" href="xv__hdmirx1_8h.html#a38c0efa82d512c42b07775e36f919bb2">XV_HdmiRx1_FrlDdcReadField()</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#ae8f2b92316ba8599c678aa9168d2eb24">XV_HdmiRx1_CfgInitialize()</a>, <a class="el" href="xv__hdmirx1__frl_8c.html#a04b941fdfc281d7d81665d47ac32f1d2">XV_HdmiRx1_FrlReset()</a>, <a class="el" href="xv__hdmirx1__frl_8c.html#adf3222be232d5b0eaabeb5fbba4258fa">XV_HdmiRx1_SetFrlLtpDetection()</a>, and <a class="el" href="xv__hdmirx1_8h.html#a8fde9d6293c66dde0cb3d18dfbf2375a">XV_HdmiRx1_UpdateEdFlags()</a>.</p>

</div>
</div>
<a class="anchor" id="a07be19e39e2a3e90ea9ac937f6adfc58"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_FrlLinkRetrain </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>LtpThreshold</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiRx1_FrlLtp&#160;</td>
          <td class="paramname"><em>DefaultLtp</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function initiates FRL rate dropping procedure. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">LtpThreshold</td><td>specifies the number of times the LTP matching module must match against the incoming link training pattern before a match is indicated</td></tr>
    <tr><td class="paramname">DefaultLtp</td><td>specify the link training pattern which will be used for link training purposes<ul>
<li>XV_HDMIRX1_LTP_LFSR0</li>
<li>XV_HDMIRX1_LTP_LFSR1</li>
<li>XV_HDMIRX1_LTP_LFSR2</li>
<li>XV_HDMIRX1_LTP_LFSR3</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Status on if FrlTraining can be started or not.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0f554039b7fe90c629cb245a727540b7">XV_HdmiRx1_Frl::DefaultLtp</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a21a4013614c2eae5fd14968ad790c669">XV_HdmiRx1_Frl::Ltp</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0eb1fb5490f5c6416d49455599444083">XV_HdmiRx1_Frl::TrainingState</a>, <a class="el" href="xv__hdmirx1_8h.html#adaa4205184958f79b8aa3d2e39b97661">XV_HdmiRx1_ExecFrlState()</a>, and <a class="el" href="xv__hdmirx1_8h.html#a095b12f733544b877279ea062c592a7d">XV_HdmiRx1_SetFrlLtpThreshold()</a>.</p>

</div>
</div>
<a class="anchor" id="a82e80b12dafcd1984f11cbddbbd68551"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_FrlLtpDetectionDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function disables the LTP detection module. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa929db9fe8649faf5c094fb703fd82f9">XV_HDMIRX1_FRL_CTRL_FLT_CLR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a32a9590fef5f8526e7c68b2ce8e88f89">XV_HDMIRX1_FRL_CTRL_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ae387ae2d8723aa7ae9367694b70ac03f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_FrlLtpDetectionEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables the LTP detection module. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a445d11205376c2220586ddd6c01fb423">XV_HDMIRX1_FRL_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa929db9fe8649faf5c094fb703fd82f9">XV_HDMIRX1_FRL_CTRL_FLT_CLR_MASK</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="a8b8df1df4274fd34afc6ad600c4d1605"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_FrlModeEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>LtpThreshold</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiRx1_FrlLtp&#160;</td>
          <td class="paramname"><em>DefaultLtp</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>FfeSuppFlag</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables the FRL mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">LtpThreshold</td><td>specifies the number of times the LTP matching module must match against the incoming link training pattern before a match is indicated</td></tr>
    <tr><td class="paramname">DefaultLtp</td><td>specify the link training pattern which will be used for link training purposes<ul>
<li>XV_HDMIRX1_LTP_LFSR0</li>
<li>XV_HDMIRX1_LTP_LFSR1</li>
<li>XV_HDMIRX1_LTP_LFSR2</li>
<li>XV_HDMIRX1_LTP_LFSR3</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Status on if FrlTraining can be started or not.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0f554039b7fe90c629cb245a727540b7">XV_HdmiRx1_Frl::DefaultLtp</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a52827fe0fcf8a35db1def1910fada68d">XV_HdmiRx1_Frl::FfeSuppFlag</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0eb1fb5490f5c6416d49455599444083">XV_HdmiRx1_Frl::TrainingState</a>, <a class="el" href="xv__hdmirx1_8h.html#adaa4205184958f79b8aa3d2e39b97661">XV_HdmiRx1_ExecFrlState()</a>, and <a class="el" href="xv__hdmirx1_8h.html#a095b12f733544b877279ea062c592a7d">XV_HdmiRx1_SetFrlLtpThreshold()</a>.</p>

</div>
</div>
<a class="anchor" id="a04b941fdfc281d7d81665d47ac32f1d2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_FrlReset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function resets the FRL peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">Reset</td><td>specifies if the FRL peripheral is under reset or not.<ul>
<li>0 = Reset released</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<ul>
<li>1 = Reset asserted</li>
</ul>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a445d11205376c2220586ddd6c01fb423">XV_HDMIRX1_FRL_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a21d52c1e98512bf55931aba594323451">XV_HDMIRX1_FRL_CTRL_RSTN_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a32a9590fef5f8526e7c68b2ce8e88f89">XV_HDMIRX1_FRL_CTRL_SET_OFFSET</a>, <a class="el" href="xv__hdmirx1_8h.html#ab17e4f96ebbe6785b411233165de859a">XV_HdmiRx1_FrlDdcWriteField()</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#ae8f2b92316ba8599c678aa9168d2eb24">XV_HdmiRx1_CfgInitialize()</a>, and <a class="el" href="xv__hdmirx1_8h.html#ac7552beea455de7ac51452cb284241f3">XV_HdmiRx1_SetHpd()</a>.</p>

</div>
</div>
<a class="anchor" id="abcaa2a7e3e0a31a5d19b99179e70c636"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XV_HdmiRx1_GetFrlActivePixRatio </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function provides FRL Ratio (Active Pixel) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>FRL Clock Ratio (Active Pixel)</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1a5393b88617a33dff7527a0c7a3f84c">XV_HDMIRX1_FRL_RATIO_ACT_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#a13af54cb5eac5be1f950b9f9ee4773a7">XV_HdmiRx1_DebugInfo()</a>.</p>

</div>
</div>
<a class="anchor" id="a6010db11abd7d7a7b935d20b693c5b7a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XV_HdmiRx1_GetFrlLtpDetection </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Lane</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the link training pattern to be detected for the selected lane. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">Lane</td><td>specifies the lane of which the Link Training Pattern will be returned.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Link Training Pattern<ul>
<li>5 = LTP5 / LFSR 0</li>
<li>6 = LTP6 / LFSR 1</li>
<li>7 = LTP7 / LFSR 2</li>
<li>8 = LTP8 / LFSR 3</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmirx1_8h.html#a38c0efa82d512c42b07775e36f919bb2">XV_HdmiRx1_FrlDdcReadField()</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#ad8f801766bca274f8235adde45ddc085">XV_HdmiRx1_ConfigFrlLtpDetection()</a>.</p>

</div>
</div>
<a class="anchor" id="afd29a2caefd6060c3546e3debe17f03b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XV_HdmiRx1_GetFrlTotalPixRatio </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function provides FRL Ratio (Total Pixel) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>FRL Clock Ratio (Total Pixel)</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9607aefecf7958adf00b11faaca7ceb0">XV_HDMIRX1_FRL_RATIO_TOT_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#a13af54cb5eac5be1f950b9f9ee4773a7">XV_HdmiRx1_DebugInfo()</a>.</p>

</div>
</div>
<a class="anchor" id="af9ac94749a5d49d68879dda13618a3fd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XV_HdmiRx1_GetPatternsMatchStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the status of the patterns matched lanes. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a7ddf3b09dbf2981e2dd320fdb3fd3115">XV_HDMIRX1_FRL_STA_FLT_PM_ALLL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a290ac811254db762d363a1f1a69e23d3">XV_HDMIRX1_FRL_STA_FLT_PM_ALLL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a96860e2915010d82971cc380b30d30fd">XV_HDMIRX1_FRL_STA_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#adebf854f66fb92c37366faab549dd4a8">XV_HdmiRx1_PhyResetPoll()</a>.</p>

</div>
</div>
<a class="anchor" id="adebf854f66fb92c37366faab549dd4a8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_PhyResetPoll </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function polls the pattern matching status and decide if the Phy needs to be reset or not. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a5e7fe7b2df2ad8498ac0605f9c8de79b">XV_HdmiRx1_Frl::Lanes</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ab7df9f45764e36ab61362f08614461d5">XV_HdmiRx1::PhyResetCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ae134dc0565019f363f41fcb807a2e4c9">XV_HdmiRx1::PhyResetRef</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="xv__hdmirx1_8h.html#af9ac94749a5d49d68879dda13618a3fd">XV_HdmiRx1_GetPatternsMatchStatus()</a>, and <a class="el" href="xv__hdmirx1_8c.html#af10ef171597554725eb963e6ee83278b">XV_HdmiRx1_TmrStartMs()</a>.</p>

</div>
</div>
<a class="anchor" id="a0544f5226d2072e3a594677139f54d70"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_ResetFrlLtpDetection </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function reset the link training pattern for the specified lane. </p>
<p>This is needed whenever the link training pattern is changed or the RxFFE is changed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">Lane</td><td>specifies the lane of which the Link Training Pattern will be detected for.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a445d11205376c2220586ddd6c01fb423">XV_HDMIRX1_FRL_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa929db9fe8649faf5c094fb703fd82f9">XV_HDMIRX1_FRL_CTRL_FLT_CLR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a32a9590fef5f8526e7c68b2ce8e88f89">XV_HDMIRX1_FRL_CTRL_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#ad8f801766bca274f8235adde45ddc085">XV_HdmiRx1_ConfigFrlLtpDetection()</a>.</p>

</div>
</div>
<a class="anchor" id="a580b1f726297a49e552e2e90aa7a80f4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int XV_HdmiRx1_RetrieveFrlRateLanes </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function updates the software's FRL Rate and FRL Lanes by reading and decoding the information from the RX core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___frl.html#af43d413c9a668400e3c0b8fbac302e19">XV_HdmiRx1_Frl::CurFrlRate</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a5e7fe7b2df2ad8498ac0605f9c8de79b">XV_HdmiRx1_Frl::Lanes</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#aa021105f3952e9e9736f572d7eaf2639">XV_HdmiRx1_Frl::LineRate</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, and <a class="el" href="xv__hdmirx1_8h.html#a38c0efa82d512c42b07775e36f919bb2">XV_HdmiRx1_FrlDdcReadField()</a>.</p>

</div>
</div>
<a class="anchor" id="aa8fec3226e7abab9b6a14251bd8705ba"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_SetFrl10MicroSecondsTimer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the timer of RX Core's FRL peripheral for 10 Microseconds. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
    <tr><td class="paramname">None.</td><td></td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, and <a class="el" href="xv__hdmirx1_8h.html#aaa7bbaf2ae1157d275c4963c2f11cd16">XV_HdmiRx1_Tmr1Start</a>.</p>

</div>
</div>
<a class="anchor" id="adf3222be232d5b0eaabeb5fbba4258fa"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_SetFrlLtpDetection </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Lane</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiRx1_FrlLtpType&#160;</td>
          <td class="paramname"><em>Ltp</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the link training pattern to be detected for the selected lane. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">Lane</td><td>specifies the lane of which the Link Training Pattern will be detected for.</td></tr>
    <tr><td class="paramname">Ltp</td><td>specifies Link Training Pattern<ul>
<li>5 = LTP5 / LFSR 0</li>
<li>6 = LTP6 / LFSR 1</li>
<li>7 = LTP7 / LFSR 2</li>
<li>8 = LTP8 / LFSR 3</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmirx1_8h.html#ab17e4f96ebbe6785b411233165de859a">XV_HdmiRx1_FrlDdcWriteField()</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#ad8f801766bca274f8235adde45ddc085">XV_HdmiRx1_ConfigFrlLtpDetection()</a>.</p>

</div>
</div>
<a class="anchor" id="a095b12f733544b877279ea062c592a7d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_SetFrlLtpThreshold </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Threshold</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the number of times the full link training patterns need to be matched before it is considered as a lock. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
    <tr><td class="paramname">Threshold</td><td>specifies the number of times the full link training patterns need to be matched.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#afa179bd6d9cac676f9b7df1ee8ffd205">XV_HDMIRX1_FRL_CTRL_FLT_THRES_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a6bc624e0b0602449534d016b66261420">XV_HDMIRX1_FRL_CTRL_FLT_THRES_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a75abb8243e3ab51c5be8507ea4e3dec8">XV_HDMIRX1_FRL_CTRL_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#a07be19e39e2a3e90ea9ac937f6adfc58">XV_HdmiRx1_FrlLinkRetrain()</a>, and <a class="el" href="xv__hdmirx1__frl_8c.html#a8b8df1df4274fd34afc6ad600c4d1605">XV_HdmiRx1_FrlModeEnable()</a>.</p>

</div>
</div>
<a class="anchor" id="a4806363b327ac1b624d0b470ab46c142"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XV_HdmiRx1_SetFrlRateWrEvent_En </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the FRL rate write enable Event. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a529c5fbb5a5dbc3e6b133550576b915d">XV_HDMIRX1_FRL_CTRL_FRL_RATE_WR_EVT_EN_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a32a9590fef5f8526e7c68b2ce8e88f89">XV_HDMIRX1_FRL_CTRL_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#ae8f2b92316ba8599c678aa9168d2eb24">XV_HdmiRx1_CfgInitialize()</a>.</p>

</div>
</div>
<h2 class="groupheader">Variable Documentation</h2>
<a class="anchor" id="a190e62ae29dcf06fde37b0d023b934df"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">const <a class="el" href="struct_x_v___hdmi_rx1___frl_scdc_field.html">XV_HdmiRx1_FrlScdcField</a> FrlScdcField[XV_HDMIRX1_SCDCFIELD_SIZE]</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This table contains the attributes for SCDC fields Each entry consists of: 1) Register Offset 2) Bits Mask 3) Bits Shift. </p>

</div>
</div>
<a class="anchor" id="a0c3427cfd06bf7a21f361cf05a3bfd91"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">const u16 FrlTimeoutLts3[4]</td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Initial value:</b><div class="fragment"><div class="line">= {</div>
<div class="line">        180,    </div>
<div class="line">         90,    </div>
<div class="line">         60,    </div>
<div class="line">         45     </div>
<div class="line">}</div>
</div><!-- fragment -->
<p>This table contains the timeout period of LTS3 for different FFE Levels in Milliseconds. </p>

</div>
</div>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
	<p class="footer">&copy; Copyright 2015-2022 Xilinx, Inc. All Rights Reserved.</p>
	<p class="footer">&copy; Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.</p>
</div>
</body>
</html>
